Programmable Logic Devices (PLDs) are semi-custom devices incuding a fixed set of logic structures which may be interconnected in several different ways to achieve a desired logic function. PLDs generally include an array of Programmable Logic Blocks (PLBs). A PLB may also be called a Configurable Logic Block (CLB), or a Configurable Logic Element (CLE), or Programmable Function Unit (PFU). Each PLB is a programmable logic circuit comprising one or more input lines, one or more output lines, one or more latches, and one or more Look-Up Tables (LUTs) along with sequential logic elements. Each LUT can be programmed to perform various functions including general combinatorial or control logic, or to operate as a Read Only Memory (ROM), Random Access Memory (RAM), or as a data path between input and output lines. In this manner, the LUT determines whether the PLB performs general logic, or operates in a special mode such as an adder, a subtracter, a counter, a register, or a memory cell.
As the size and speed of PLDs increase, the power consumption also increases. The device architecture directly affects the power efficiency which can be expected in any design. PLDs generally use low-power technologies such as CMOS technology. However, in high-density PLDs the power-consumption issue becomes a limiting factor in spite of the low-power technology used. This results in the limitation that all the resources (logic blocks, routing, etc.) of the device cannot be used at the maximum speed owing to excessive temperature rise. The power consumption of the device also directly affects reliability and cost. Almost all power consumption in PLDs is dynamic powerbecause it is the result of charging and discharging of internal and external capacitance. One of the main causes of dynamic power consumption in PLDs is clock-distribution power. High-speed switching in clock distribution results in considerably higher power consumption. Thus, it is typically safe to operate a PLD device at lower speed with a low-cost package without any heat sink. However, at high speed the reliability of the device can typically be sustained only by using an expensive package alone or together with a heat sink.
Furthermore, sequential logic elements and data-storage circuit elements including memory cells incorporate edge-triggered flip-flops as the basic building block. These flip-flops, being edge-triggered, operate on only a specific edge of the clock signal. The remaining edge of the clock signal typically does not produce any circuit action. However, the unused edge does contribute to an equal amount of wasteful power dissipation. It is therefore desirable to have a mechanism that enables useful operation on the unused clock edges.